Monday 29 April 2013

Makefile in linux Kernel


The Makefile controls the creation of the actual image file. This includes control of the program and
device files install destinations, install destinations of data and configuration files required by the program, and checksum generation. Makefile with single source file.

hello.c
------------------------------------------------------------------------------------------------------------------------
#include <stdio.h>
int main()
{
printf(“World”);
return 0;
}
------------------------------------------------------------------------------------------------------------------------

Makefile
------------------------------------------------------------------------------------------------------------------------
EXEC = hello
OBJS = hello.o

all: $(EXEC)
$(EXEC): $(OBJS)
$(CC) $(LDFLAGS) -o $@ $(OBJS) $(LDLIBS)
clean:
-rm -f $(EXEC) *.elf *.gdb *.o
%.o: %.c
$(CC) -c $(CFLAGS) -o $@ $< //if $(CC) =$(CROSS_COMPILE_APPS)gcc

------------------------------------------------------------------------------------------------------------------------

Executables with multiple source code files can be supported by making changes in the Makefile. The following example generates a single executable.

For Example: hello from hello.c and print.c.

hello.c
------------------------------------------------------------------------------------------------------------------------
#include <stdio.h>
extern void print_hello(char * string);
int main(int argc, char * argv[])
{
print_hello(“World”);
return 0;
}

------------------------------------------------------------------------------------------------------------------------

print.c
------------------------------------------------------------------------------------------------------------------------
void print_hello(char * string)
{
printf(“Hello %s\n”, string);
}
------------------------------------------------------------------------------------------------------------------------
Makefile
------------------------------------------------------------------------------------------------------------------------
EXEC = hello
OBJS = hello.o print.o ----------------------------------- Add “print.o”

all: $(EXEC)
$(EXEC): $(OBJS)
$(CC) $(LDFLAGS) -o $@ $(OBJS) $(LDLIBS)
clean:
-rm -f $(EXEC) *.elf *.gdb *.o
%.o: %.c
$(CC) -c $(CFLAGS) -o $@ $< //if $(CC) =$(CROSS_COMPILE_APPS)gcc

------------------------------------------------------------------------------------------------------------------------
This Makefile will create two files
  1. FLAT: formate binary file, This is the file which is an executable on target.
  2. .gdb: extension file, This will be containing additional debug & symbol table information to allow user to debug user application program with GBD.

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